It is desirable to be able to control threshold voltage (Vt) in metal oxide semiconductor field effect transistor (MOSFET) devices. For instance, some MOSFET designs include multiple Vt's wherein the Vt varies from one device to another. In bulk MOSFET designs wherein the channel is formed in a bulk semiconductor, the Vt is often adjusted through doping. However, setting multiple Vt's in a fully depleted device is challenging since doping is no longer an option to adjust Vt.
Varying amounts of a workfunction setting metal in the gate stack has been used to change the Vt in planar complementary metal-oxide semiconductor (CMOS) devices. See, for example, U.S. Pat. No. 8,673,731 issued to Chang et al., entitled “Techniques for Gate Workfunction Engineering to Reduce Short Channel Effects in Planar CMOS Devices” (hereinafter “U.S. Pat. No. 8,673,731”). As described in U.S. Pat. No. 8,673,731, the more metal in the gate, the lower the Vt.
There however exists a need for efficient and effective techniques for controlling Vt in non-planar device configurations.